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<base href="https://llvm.org/bugs/" />
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<body><table border="1" cellspacing="0" cellpadding="8">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - PPC64 Target initDwarfEHRegSizeTable has wrong register size and there is no register 114, 115, 116"
href="https://llvm.org/bugs/show_bug.cgi?id=27931">27931</a>
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</tr>
<tr>
<th>Summary</th>
<td>PPC64 Target initDwarfEHRegSizeTable has wrong register size and there is no register 114, 115, 116
</td>
</tr>
<tr>
<th>Product</th>
<td>clang
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>Other
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>LLVM Codegen
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedclangbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>bluechristlove@163.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>In the PPC64TargetCodeGenInfo, we have one function initDwarfEHRegSizeTable to
support built in function __builtin_init_dwarf_reg_size_table. However,
according to ABI ducumentation:
<a href="http://openpowerfoundation.org/?resource_lib=power-architecture-64-bit-elf-v2-abi-specification-also-openpower-abi-for-linux-supplement">http://openpowerfoundation.org/?resource_lib=power-architecture-64-bit-elf-v2-abi-specification-also-openpower-abi-for-linux-supplement</a>
page 91 Table 2-23 and GCC supplement output (see blow example), we can find
that register 64 to register 67 width is 8 bytes, but our implementatio is 4
bytes. code is here:
// 64-76 are various 4-byte special-purpose registers:
// 64: mq
// 65: lr
// 66: ctr
// 67: ap
// 68-75 cr0-7
// 76: xer
AssignToArrayRange(Builder, Address, Four8, 64, 76);
Meanwhile, according to this table and GCC supplement output, we can find we
omit register tfhar, register tfiar, register texasr, which are numbered as
114, 115 and 116. But now, we only have 113.
// 109: vrsave
// 110: vscr
// 111: spe_acc
// 112: spefscr
// 113: sfp
AssignToArrayRange(Builder, Address, Four8, 109, 113);
So, we should add it.
One test code of GCC output supplement:
[code]
int arr[1024];
int main() {
__builtin_init_dwarf_reg_size_table(arr);
return 0;
}
[/code]
gcc t.c -S
the assembly file is:
...
.LC0:
.quad arr
.LC1:
.quad arr+1
.LC2:
.quad arr+2
.LC3:
.quad arr+3
.LC4:
.quad arr+4
.LC5:
.quad arr+5
.LC6:
.quad arr+6
......
addis 10,2,.LC64@toc@ha
ld 9,.LC64@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC65@toc@ha
ld 9,.LC65@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC66@toc@ha
ld 9,.LC66@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC67@toc@ha
ld 9,.LC67@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC68@toc@ha
ld 9,.LC68@toc@l(10)
li 10,4
stb 10,0(9)
...
addis 10,2,.LC113@toc@ha
ld 9,.LC113@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC114@toc@ha
ld 9,.LC114@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC115@toc@ha
ld 9,.LC115@toc@l(10)
li 10,8
stb 10,0(9)
addis 10,2,.LC116@toc@ha
ld 9,.LC116@toc@l(10)
li 10,8
stb 10,0(9)
....</pre>
</div>
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