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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [InstCombine] eliminate bitcasts around bitwise logic ops when one input type and output type match"
href="https://llvm.org/bugs/show_bug.cgi?id=27925">27925</a>
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<th>Summary</th>
<td>[InstCombine] eliminate bitcasts around bitwise logic ops when one input type and output type match
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<th>Product</th>
<td>libraries
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Scalar Optimizations
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>spatel+llvm@rotateright.com
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
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</tr></table>
<p>
<div>
<pre>define <4 x i32> @bitcasts(<4 x i32> %a, <8 x i16> %b) {
%bc1 = bitcast <4 x i32> %a to <2 x i64>
%bc2 = bitcast <8 x i16> %b to <2 x i64>
%and = and <2 x i64> %bc2, %bc1
%bc3 = bitcast <2 x i64> %and to <4 x i32>
ret <4 x i32> %bc3
}
By transforming the 'and' to <4 x i32> type, we eliminate 2 bitcasts:
define <4 x i32> @bitcasts(<4 x i32> %a, <8 x i16> %b) {
%bc2 = bitcast <8 x i16> %b to <4 x i32>
%and = and <4 x i32> %a, %bc2
ret <4 x i32> %and
}
Should this be limited to vector types?</pre>
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