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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - atomic_signal_fence generates a dmb instruction on aarch64"
href="https://llvm.org/bugs/show_bug.cgi?id=27545">27545</a>
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<th>Summary</th>
<td>atomic_signal_fence generates a dmb instruction on aarch64
</td>
</tr>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: AArch64
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>yyc1992@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>The following program
```
#include <stdatomic.h>
void f()
{
atomic_signal_fence(memory_order_seq_cst);
}
```
generates
```
f: // @f
// BB#0:
dmb ish
ret
```
when compiling with `clang -O2` and simply a `ret` when compiling with `gcc`.
Since this is a signal fence and not a thread fence, I think the memory barrier
instruction should not be necessary.</pre>
</div>
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