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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [AArch64] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize"
href="https://llvm.org/bugs/show_bug.cgi?id=27053">27053</a>
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<th>Summary</th>
<td>[AArch64] Do not lower scalar sdiv/udiv to a shifts + mul sequence when optimizing for minsize
</td>
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<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: AArch64
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>mcrosier@codeaurora.org
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>This was implemented for X86 in r245431 by overriding isIntDivCheap(). We
should do the same for AArch64.
>From X86ISelLowering.cpp:
bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeSet Attr) const {
// Integer division on x86 is expensive. However, when aggressively
optimizing
// for code size, we prefer to use a div instruction, as it is usually
smaller
// than the alternative sequence.
// The exception to this is vector division. Since x86 doesn't have vector
// integer division, leaving the division as-is is a loss even in terms of
// size, because it will have to be scalarized, while the alternative code
// sequence can be performed in vector form.
bool OptSize = Attr.hasAttribute(AttributeSet::FunctionIndex,
Attribute::MinSize);
return OptSize && !VT.isVector();
}</pre>
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</p>
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