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<base href="https://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [Greedy RegAlloc] register splitting around loop can reduce spills inside hot loop"
href="https://llvm.org/bugs/show_bug.cgi?id=26597">26597</a>
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<th>Summary</th>
<td>[Greedy RegAlloc] register splitting around loop can reduce spills inside hot loop
</td>
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<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Register Allocator
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>wmi@google.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Created <span class=""><a href="attachment.cgi?id=15895" name="attach_15895" title="testcase 1.cxx">attachment 15895</a> <a href="attachment.cgi?id=15895&action=edit" title="testcase 1.cxx">[details]</a></span>
testcase 1.cxx
For the testcase 1.cxx attached,
~/workarea/llvm-r255910/rbuild/bin/clang++ -O2 -S 1.cxx -o 1.s
.LBB1_2: # %while.body
# =>This Inner Loop Header: Depth=1
movq %r13, %rdi
callq _Znam
movq %rax, %rbp
movq %r14, %rdi
movq %r15, %rsi
movq %rbp, %rdx
callq _Z4copyIPdS0_EvT_S1_T0_
movq 8(%rsp), %rax # 8-byte Reload
leaq (%rbp,%rax,8), %rsi
movq %rbp, %rdi
callq _Z6uniqueIPdEvT_S1_
decl %r12d
cmpl $1, %r12d
jg .LBB1_2
There is a spill reload inside the hot loop. However, callee save register %rbx
is never used inside the loop. It is used by a vreg which lives across the loop
without any reference inside of it.
We can improve it by doing reg splitting for such vreg living across hot loop.
For the testcase above, the splitting will make %rbx available for the loop and
remove the spill from the loop. The code after reg splitting may look like the
following:
movq %rbx, 8(%rsp) # Spill
.LBB1_2: # %while.body
# =>This Inner Loop Header: Depth=1
movq %r13, %rdi
callq _Znam
movq %rax, %rbp
movq %r14, %rdi
movq %r15, %rsi
movq %rbp, %rdx
callq _Z4copyIPdS0_EvT_S1_T0_
leaq (%rbp,%rbx,8), %rsi
movq %rbp, %rdi
callq _Z6uniqueIPdEvT_S1_
decl %r12d
cmpl $1, %r12d
jg .LBB1_2
movq 8(%rsp), %rbx # Reload</pre>
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