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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Instruction scheduling model for the KNL"
href="https://llvm.org/bugs/show_bug.cgi?id=26418">26418</a>
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<th>Summary</th>
<td>Instruction scheduling model for the KNL
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>Backend: X86
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>hfinkel@anl.gov
</td>
</tr>
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
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<th>Classification</th>
<td>Unclassified
</td>
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<p>
<div>
<pre>We need to have a real instruction scheduling model for the KNL. Aside from
anything else, it seems reasonable to switch the default to be more like
Silvermont than like Haswell, plus there is a significant amount of information
here (under the "MICROARCHITECTURE" heading):
<a href="https://software.intel.com/en-us/articles/what-disclosures-has-intel-made-about-knights-landing">https://software.intel.com/en-us/articles/what-disclosures-has-intel-made-about-knights-landing</a>
plus from Avinash's HotChips presentation:
<a href="http://www.hotchips.org/wp-content/uploads/hc_archives/hc27/HC27.25-Tuesday-Epub/HC27.25.70-Processors-Epub/HC27.25.710-Knights-Landing-Sodani-Intel.pdf">http://www.hotchips.org/wp-content/uploads/hc_archives/hc27/HC27.25-Tuesday-Epub/HC27.25.70-Processors-Epub/HC27.25.710-Knights-Landing-Sodani-Intel.pdf</a></pre>
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</p>
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