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<base href="https://llvm.org/bugs/" />
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<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [x86, SSE] suboptimal register allocation for scalar minnum/maxnum"
href="https://llvm.org/bugs/show_bug.cgi?id=25959">25959</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[x86, SSE] suboptimal register allocation for scalar minnum/maxnum
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: X86
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>spatel+llvm@rotateright.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvm-bugs@lists.llvm.org
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Follow-on from <a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - [x86] fmax/fmin calls should be optimized and inlined"
href="show_bug.cgi?id=24475">bug 24475</a>: the scalar codegen could be almost identical to the
vector codegen (just change 'ps' ops to 'ss' ops), but different register
allocation causes us to need more register copies.
$ cat fmax.ll
declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
declare float @llvm.maxnum.f32(float, float)
define float @maxnum_f32(float %x, float %y) {
%call = tail call float @llvm.maxnum.f32(float %x, float %y)
ret float %call
}
define <4 x float> @maxnum_v4f32(<4 x float> %x, <4 x float> %y) {
%call = tail call <4 x float> @llvm.maxnum.v4f32(<4 x float> %x, <4 x float>
%y)
ret <4 x float> %call
}
$ ./llc fmax.ll -o -
_maxnum_f32:
movaps %xmm0, %xmm2 <--- could have copied %xmm1 instead
cmpunordss %xmm2, %xmm2
movaps %xmm2, %xmm3 <--- extra move
andps %xmm1, %xmm3
maxss %xmm0, %xmm1
andnps %xmm1, %xmm2
orps %xmm3, %xmm2
movaps %xmm2, %xmm0 <--- extra move
retq
_maxnum_v4f32:
movaps %xmm1, %xmm2
maxps %xmm0, %xmm2
cmpunordps %xmm0, %xmm0
andps %xmm0, %xmm1
andnps %xmm2, %xmm0
orps %xmm1, %xmm0
retq</pre>
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