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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [AArch64] - i1 zextloads marked as legal; requires workaround in CodeGenPrepare::optimizeLoadExt"
href="https://llvm.org/bugs/show_bug.cgi?id=25591">25591</a>
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<th>Summary</th>
<td>[AArch64] - i1 zextloads marked as legal; requires workaround in CodeGenPrepare::optimizeLoadExt
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>All
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AArch64
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>gberry@codeaurora.org
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<th>CC</th>
<td>llvm-bugs@lists.llvm.org
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<th>Classification</th>
<td>Unclassified
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</tr></table>
<p>
<div>
<pre>Currently the AArch64 target returns true for isLoadExtLegal(ZEXTLOAD, i64/i32,
i1). CodeGenPrepare::optimizeLoadExt() uses isLoadExtLegal() to determine if
the pattern (and (load x) mask) will be selected as a single instruction. (and
(load x) 1) is not selected as a single instruction for AArch64 however,
despite what isLoadExtLegal says. There is currently a check (ActiveBits <= 1)
in optimizeLoadExt() to work around this discrepancy. The right fix may be to
mark these i1 zextloads as Promote in the AArch64 backend.
This issue came up in the development of the following change:
<a href="http://reviews.llvm.org/D14584">http://reviews.llvm.org/D14584</a></pre>
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