<html><head></head><body><div style="color:#000; background-color:#fff; font-family:HelveticaNeue-Light, Helvetica Neue Light, Helvetica Neue, Helvetica, Arial, Lucida Grande, sans-serif;font-size:16px"><pre id="yui_3_16_0_1_1447671334933_2753" class="">Hi all,</pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">I'm currently building a vliw port based on a llvm 3.5.0 from 2014, where I have enabled the MachineScheduler to run bottom up. </pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">I see that there is an issue with respect to the moment when instructions move from pending to ready. </pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">Namely instructions which should still be pending become ready too earlysuch that I end up with true dependent instructions being issued at the same cycle.I think the issue comes from ScheduleDAGMILive::schedule() function. </pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">Inside it the updating of the queues happens before SchedImpl->schedNode(SU, IsTopNode) is being called while should have happened after.</pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">See bellow the code fragment where perhaps the call from 1020 should be after line 1032:</pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">1020: updateQueues(SU, IsTopNode); </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> if (DFSResult) { </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> unsigned SubtreeID = DFSResult->getSubtreeID(SU); </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> if (!ScheduledTrees.test(SubtreeID)) { </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> ScheduledTrees.set(SubtreeID); </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> DFSResult->scheduleTree(SubtreeID); </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> SchedImpl->scheduleTree(SubtreeID); </pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""> } </pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">} </pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">// Notify the scheduling strategy after updating the DAG.</pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">1032: SchedImpl->schedNode(SU, IsTopNode);
<br></pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">The MachineScheduler.cpp file that I use in my port you can see here:<a href="http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/CodeGen/MachineScheduler.cpp?revision=215011&view=markup" id="yui_3_16_0_1_1447671334933_2755" class="">http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/CodeGen/MachineScheduler.cpp?revision=215011&view=markup</a>
For oo machines the issue that I observe wont trigger a bug but in my case as im porting llvmto a vliw (where i produce bundles) instructions becoming ready too early leads to incorrect code. However for oo machines I think this issue may induce a performance
loss as less instructions that can be issued in parallel endup up next to each other.</pre><pre id="yui_3_16_0_1_1447671334933_2753" class=""><br></pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">thanks,</pre><pre id="yui_3_16_0_1_1447671334933_2753" class="">Alex</pre></div></body></html>