<html>
    <head>
      <base href="https://llvm.org/bugs/" />
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - [AArch64LoadStoreOptimizer] Pair loads of different widths; e.g., LDRW + LDRX"
   href="https://llvm.org/bugs/show_bug.cgi?id=24507">24507</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[AArch64LoadStoreOptimizer] Pair loads of different widths; e.g., LDRW + LDRX
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Windows NT
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AArch64
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>mcrosier@codeaurora.org
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>gberry@codeaurora.org, junbuml@codeaurora.org, llvm-bugs@lists.llvm.org, mcrosier@codeaurora.org, mssimpso@codeaurora.org
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>From a hot loop in 400.perlbench:

  4b345c:       b9402ff0        ldr     w16, [sp,#44]
  4b3460:       aa1703e2        mov     x2, x23
  4b3464:       f9401bfa        ldr     x26, [sp,#48]

We should be able to form a ldp from the two load instructions, despite the
fact that the two are of different sizes.  We'd need to zero out the upper bits
of x16, but I'm thinking a (ldp + and) is less expensive than (ldr + ldr).

We also need to think about more subtle things such as accessing data across
page boundaries that wouldn't have been accessed otherwise or accessing illegal
addresses (in the heap).  I believe it's safe to access anything on the stack.

This optimization is specific to loads.  We cannot easily do such an
optimization for stores.</pre>
        </div>
      </p>
      <hr>
      <span>You are receiving this mail because:</span>
      
      <ul>
          <li>You are on the CC list for the bug.</li>
      </ul>
    </body>
</html>