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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [AArch64] Improve load/store optimizer to handle load pairs with same dest register"
href="https://llvm.org/bugs/show_bug.cgi?id=24474">24474</a>
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<th>Summary</th>
<td>[AArch64] Improve load/store optimizer to handle load pairs with same dest register
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<th>Product</th>
<td>libraries
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>normal
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: AArch64
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<th>Assignee</th>
<td>mcrosier@codeaurora.org
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<th>Reporter</th>
<td>mcrosier@codeaurora.org
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<th>CC</th>
<td>bmakam@codeaurora.org, gberry@codeaurora.org, ghoflehner@apple.com, james.molloy@arm.com, junbuml@codeaurora.org, llvm-bugs@lists.llvm.org, matze@braunis.de, mssimpso@codeaurora.org
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<th>Classification</th>
<td>Unclassified
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<p>
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<pre>Currently, the AArch64 load/store optimizer fails to create load store pairs
when adjacent loads have the same destination register. If we have a free
register, we can allocate a register to remove this dependency.
In r241920, Matthias enhanced the ARM load/store optimization pass to use
LivePhysRegs to find free registers instead of the RegisterScavenger. We
should use LivePhysRegs in the AArch64 load/store optimizer as well.</pre>
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