<html>
<head>
<base href="https://llvm.org/bugs/" />
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW " title="NEW --- - T1 instructions not printed correctly inside IT blocks" href="https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_bugs_show-5Fbug.cgi-3Fid-3D24340&d=AwMBaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=pF93YEPyB-J_PERP4DUZOJDzFVX5ZQ57vQk33wu0vio&m=JC0AzLncKPf_D4kinme1Xm3H9ZkSPYXQWGK6cFS8xzw&s=bfu2ib9SXll7xxqxWknmse5jwpkH7CAJXwKqSRXspQQ&e=">24340</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>T1 instructions not printed correctly inside IT blocks
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>Backend: ARM
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>james.molloy@arm.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Thumb1 instructions such as "rsbs" are written differently when inside IT
blocks to reflect their change in semantics, according to the ARMARM.
When inside an IT block, these instructions don't set the flags. The ARMARM
says (v7-M ARMARM, A7.7.117:
RSBS <Rd>,<Rn>,#0 Outside IT block.
RSB<c> <Rd>,<Rn>,#0 Inside IT block.
LLVM does not currently model this.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
</ul>
</body>
</html>