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      <base href="https://llvm.org/bugs/" />
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW " title="NEW --- - lib/Target/AMDGPU/SIInstrInfo.cpp: 3 * redundant condition ?" href="https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_bugs_show-5Fbug.cgi-3Fid-3D23960&d=AwMBaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=pF93YEPyB-J_PERP4DUZOJDzFVX5ZQ57vQk33wu0vio&m=Uurpks26Bxuhj2p_HLex8QYWy-OGehaVQXsialdtZBE&s=3lpurh3l4eBV4fpHUQbBafhOeI3LVjxRfV6d6aEy588&e=">23960</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>lib/Target/AMDGPU/SIInstrInfo.cpp: 3 * redundant condition ?
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>new-bugs
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>new bugs
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>dcb314@hotmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvmbugs@cs.uiuc.edu
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>1.

[trunk/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:939]: (style) Redundant
condition: Src1.isReg(). 'A && (!A || B)' is equivalent to 'A || B'

Source code is

 if (!Src1->isReg() ||
          (Src1->isReg() && RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))))
        return false;

Same thing at lines 943 and 999.</pre>
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