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      <base href="https://llvm.org/bugs/" />
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW " title="NEW --- - Handling of ARM Errata 602117 (and testcase) is broken" href="https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_bugs_show-5Fbug.cgi-3Fid-3D23912&d=AwMBaQ&c=8hUWFZcy2Z-Za5rBPlktOQ&r=pF93YEPyB-J_PERP4DUZOJDzFVX5ZQ57vQk33wu0vio&m=8XYBT_3nFCqU-87S1yAlWaYSsZmFsdMS1klH9z-KlTs&s=lpC159-GBuv6edofLmC3IgkrHfSya8MrHaAuG4EZ-84&e=">23912</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>Handling of ARM Errata 602117 (and testcase) is broken
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: ARM
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>matze@braunis.de
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvmbugs@cs.uiuc.edu
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>While working on the ARMLoadStoreOptimizer code I realized that the handling of
Cortex-M3 Errata 602117 and the llvm-lit test that checks for it are faulty. If
you use the following test instead, you still see an invalid ldrd created, even
with -mcpu=cortex-m3.

; we call the following two to force values into specific registers.
declare i64* @get_ptr()
declare void @use_i64(i64 %v)

define void @test_ldrd(i64 %a) nounwind readonly {
  %ptr = call i64* @get_ptr()
  %v = load i64, i64* %ptr, align 8
  call void @use_i64(i64 %v)
  ret void
}

Results in:
...
    bl    _get_ptr
    ldrd    r0, r1, [r0]
    bl    _use_i64
...</pre>
        </div>
      </p>
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