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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - llvm 16 bit integer code causes lots of partial register stalls"
href="https://llvm.org/bugs/show_bug.cgi?id=23155">23155</a>
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<th>Summary</th>
<td>llvm 16 bit integer code causes lots of partial register stalls
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>kevin.b.smith@intel.com
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
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<p>
<div>
<pre>When generating code for one of the eembc/telecom kernels llvm generates
a lot of 16 bit operations, specifically loads that cause partial register
usage. Due to the false dependency on the upper portion of
the register, these operations are much slower than if they were expanded to be
32 bit operations.
This specifically impacts the code generated for EEMBC/telecom/viterb00.c
routine ACS. Eliminating the partial register stalls increases performance
by about 27% for the data_2 input set. For other input sets the performance
improvement is less, but it is significant for all of those inputs.</pre>
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