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    <head>
      <base href="https://llvm.org/bugs/" />
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - [AArch64] Useless register shuffling with tail-call"
   href="https://llvm.org/bugs/show_bug.cgi?id=23085">23085</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>[AArch64] Useless register shuffling with tail-call
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: AArch64
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>james.greenhalgh@arm.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>james.molloy@arm.com, llvmbugs@cs.uiuc.edu
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=14124" name="attach_14124" title="testcase">attachment 14124</a> <a href="attachment.cgi?id=14124&action=edit" title="testcase">[details]</a></span>
testcase

For the attached testcase, LLVM produces:

clang --target aarch64 tail-call-allocation.c -O2 -S

foo:                            
    mov     w8, w0         /* Poor register choice.  */
    movz    w9, #0x4e20
    cmp     w8, w9
    b.le    .LBB0_2
    mov     w0, w8
    ret
.LBB0_2:                         
    mov     w0, wzr 
    add    w1, w8, w8, lsl #6
    b    bar


GCC produces:

foo:
    mov    w2, 20000
    cmp    w0, w2
    ble    .L4
    ret
    .p2align 3
.L4:
    add    w1, w0, w0, lsl 6
    mov    w0, 0
    b    bar

In the LLVM case, the scheduling of:

    mov     w0, wzr 
    add    w1, w8, w8, lsl #6

prevents better register allocation as the live range for w0 as an outgoing
argument overlaps with that of w0 as an incoming argument.</pre>
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