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<head>
<base href="https://llvm.org/bugs/" />
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<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - LLVM ERROR: Cannot select fault on trunk"
href="https://llvm.org/bugs/show_bug.cgi?id=22955">22955</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>LLVM ERROR: Cannot select fault on trunk
</td>
</tr>
<tr>
<th>Product</th>
<td>tools
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>Linux
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>llc
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>anton.mitrokhin@phystech.edu
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Reproducer:
idiv.ll:
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S1
target triple = "i386-unknown-linux-gnu"
define void @f_f(float* noalias nocapture %RET, float %aFOO, i3
allocas:
%__idiv_table_u32_offset10_offset_load.i = add i64 0, -2
br label %if_then18.i
if_then18.i:
%aFOO_load_to_uint32 = fptoui float %aFOO to i32
%aFOO_load_to_uint32_broadcast_init = insertelement <8 x i32>
%aFOO_load_to_uint32_broadcast = shufflevector <8 x i32> %aFO
%multiplier_load_broadcast_init.i = insertelement <8 x i64> u
%multiplier_load_broadcast.i = shufflevector <8 x i64> %multi
%numerator_load_to_uint64.i = zext <8 x i32> %aFOO_load_to_ui
;if replace '%__idiv_table_u32_offset10_offset_load.i' with '
%add__shift_load21.i = add i64 %__idiv_table_u32_offset10_off
%add__shift_load21_broadcast_init.i = insertelement <8 x i64>
%add__shift_load21_broadcast.i = shufflevector <8 x i64> %add
%mul_val_load_mult_load.i = mul <8 x i64> %numerator_load_to_
%bitop22.i = lshr <8 x i64> %mul_val_load_mult_load.i, %add__
%bitop22_to_uint32.i = trunc <8 x i64> %bitop22.i to <8 x i32
br label %__fast_idiv___UM_vyuunu.exit
__fast_idiv___UM_vyuunu.exit:
%calltmp_to_float = uitofp <8 x i32> %bitop22_to_uint32.i to
%ptrcast = bitcast float* %RET to <8 x float>*
store <8 x float> %calltmp_to_float, <8 x float>* %ptrcast, a
ret void
}
attributes #0 = { nounwind }
!llvm.ident = !{!0}
!0 = !{!"clang version 3.7.0 (trunk 231404)"}
!1 = !{!"/tests/idiv"}
!2 = !{i32 6}
!3 = !{i32 4}
!4 = !{i32 21}
execute:
llc idiv.ll -o test.s --mattr='+avx2'
output:
LLVM ERROR: Cannot select: 0x24cae70: v4i64 = X86ISD::VSRL 0x24cdd70, 0x24d1060
[ORD=12] [ID=43]
0x24cdd70: v4i64 = add 0x24d05c0, 0x24d05c0 [ORD=11] [ID=39]
0x24d05c0: v4i64 = X86ISD::VZEXT 0x24ca3d0 [ORD=7] [ID=37]
0x24ca3d0: v4i32 = X86ISD::VBROADCAST 0x24ce0a0 [ORD=7] [ID=35]
0x24ce0a0: i32,ch = load 0x24d08f0, 0x24cd4f0,
0x24d0b10<LD4[FixedStack1](align=8)> [ORD=2] [ID=33]
0x24cd4f0: i32 = FrameIndex<1> [ID=15]
0x24d0b10: i32 = undef [ID=12]
0x24d05c0: v4i64 = X86ISD::VZEXT 0x24ca3d0 [ORD=7] [ID=37]
0x24ca3d0: v4i32 = X86ISD::VBROADCAST 0x24ce0a0 [ORD=7] [ID=35]
0x24ce0a0: i32,ch = load 0x24d08f0, 0x24cd4f0,
0x24d0b10<LD4[FixedStack1](align=8)> [ORD=2] [ID=33]
0x24cd4f0: i32 = FrameIndex<1> [ID=15]
0x24d0b10: i32 = undef [ID=12]
0x24d1060: v4i64 = bitcast 0x24d14a0 [ORD=10] [ID=42]
0x24d14a0: v8i32 = insert_subvector 0x24d1390, 0x24d1d00, 0x24ca5f0
[ORD=10] [ID=41]
0x24d1390: v8i32 = insert_subvector 0x24cdc60, 0x24d1d00, 0x24ca920
[ORD=10] [ID=40]
0x24cdc60: v8i32 = undef [ID=10]
0x24d1d00: v4i32 = insert_vector_elt 0x24d1ae0, 0x24d0f50, 0x24d1bf0
[ORD=10] [ID=38]
0x24d1ae0: v4i32 = insert_vector_elt 0x24cad60, 0x24ca700, 0x24d0e40
[ORD=10] [ID=36]
0x24cad60: v4i32 = insert_vector_elt 0x24d07e0, 0x24d0f50,
0x24d1280 [ORD=10] [ID=34]
0x24d07e0: v4i32 = scalar_to_vector 0x24ca700 [ORD=10] [ID=31]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8]
[ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8]
[ID=24]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d0f50: i32,i32 = X86ISD::ADC 0x24ca810, 0x24ca920,
0x24ca700:1 [ORD=8] [ID=32]
0x24ca810: i32 = AssertSext 0x24caf80, 0x24caa30 [ORD=8]
[ID=27]
0x24caf80: i32,ch = CopyFromReg 0x24ca2c0:1, 0x24cd600
[ORD=8] [ID=23]
0x24ca920: i32 = Constant<0> [ID=8]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8]
[ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8]
[ID=24]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d1280: i32 = Constant<1> [ID=16]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8]
[ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8] [ID=24]
0x24ca2c0: i32,ch = CopyFromReg 0x2473ad0, 0x24ca4e0 [ORD=8]
[ID=20]
0x24ca4e0: i32 = Register %vreg0 [ID=2]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d0e40: i32 = Constant<2> [ID=11]
0x24d0f50: i32,i32 = X86ISD::ADC 0x24ca810, 0x24ca920, 0x24ca700:1
[ORD=8] [ID=32]
0x24ca810: i32 = AssertSext 0x24caf80, 0x24caa30 [ORD=8] [ID=27]
0x24caf80: i32,ch = CopyFromReg 0x24ca2c0:1, 0x24cd600 [ORD=8]
[ID=23]
0x24cd600: i32 = Register %vreg1 [ID=4]
0x24ca920: i32 = Constant<0> [ID=8]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8]
[ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8] [ID=24]
0x24ca2c0: i32,ch = CopyFromReg 0x2473ad0, 0x24ca4e0 [ORD=8]
[ID=20]
0x24ca4e0: i32 = Register %vreg0 [ID=2]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d1bf0: i32 = Constant<3> [ID=17]
0x24ca920: i32 = Constant<0> [ID=8]
0x24d1d00: v4i32 = insert_vector_elt 0x24d1ae0, 0x24d0f50, 0x24d1bf0
[ORD=10] [ID=38]
0x24d1ae0: v4i32 = insert_vector_elt 0x24cad60, 0x24ca700, 0x24d0e40
[ORD=10] [ID=36]
0x24cad60: v4i32 = insert_vector_elt 0x24d07e0, 0x24d0f50, 0x24d1280
[ORD=10] [ID=34]
0x24d07e0: v4i32 = scalar_to_vector 0x24ca700 [ORD=10] [ID=31]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8]
[ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8]
[ID=24]
0x24ca2c0: i32,ch = CopyFromReg 0x2473ad0, 0x24ca4e0 [ORD=8]
[ID=20]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d0f50: i32,i32 = X86ISD::ADC 0x24ca810, 0x24ca920, 0x24ca700:1
[ORD=8] [ID=32]
0x24ca810: i32 = AssertSext 0x24caf80, 0x24caa30 [ORD=8] [ID=27]
0x24caf80: i32,ch = CopyFromReg 0x24ca2c0:1, 0x24cd600 [ORD=8]
[ID=23]
0x24cd600: i32 = Register %vreg1 [ID=4]
0x24ca920: i32 = Constant<0> [ID=8]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8]
[ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8]
[ID=24]
0x24ca2c0: i32,ch = CopyFromReg 0x2473ad0, 0x24ca4e0 [ORD=8]
[ID=20]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d1280: i32 = Constant<1> [ID=16]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8] [ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8] [ID=24]
0x24ca2c0: i32,ch = CopyFromReg 0x2473ad0, 0x24ca4e0 [ORD=8]
[ID=20]
0x24ca4e0: i32 = Register %vreg0 [ID=2]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d0e40: i32 = Constant<2> [ID=11]
0x24d0f50: i32,i32 = X86ISD::ADC 0x24ca810, 0x24ca920, 0x24ca700:1
[ORD=8] [ID=32]
0x24ca810: i32 = AssertSext 0x24caf80, 0x24caa30 [ORD=8] [ID=27]
0x24caf80: i32,ch = CopyFromReg 0x24ca2c0:1, 0x24cd600 [ORD=8]
[ID=23]
0x24cd600: i32 = Register %vreg1 [ID=4]
0x24ca920: i32 = Constant<0> [ID=8]
0x24ca700: i32,i32 = X86ISD::ADD 0x24cd710, 0x24cab40 [ORD=8] [ID=28]
0x24cd710: i32 = AssertSext 0x24ca2c0, 0x24cd930 [ORD=8] [ID=24]
0x24ca2c0: i32,ch = CopyFromReg 0x2473ad0, 0x24ca4e0 [ORD=8]
[ID=20]
0x24ca4e0: i32 = Register %vreg0 [ID=2]
0x24cab40: i32 = Constant<32> [ID=7]
0x24d1bf0: i32 = Constant<3> [ID=17]
0x24ca5f0: i32 = Constant<4> [ID=9]
In function: f_f</pre>
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