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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - AVX code can be slower than SSE code"
href="http://llvm.org/bugs/show_bug.cgi?id=22522">22522</a>
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<th>Summary</th>
<td>AVX code can be slower than SSE code
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
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<th>Version</th>
<td>3.6
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>pitrou@free.fr
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
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<pre>Created <span class=""><a href="attachment.cgi?id=13829" name="attach_13829" title="IR file">attachment 13829</a> <a href="attachment.cgi?id=13829&action=edit" title="IR file">[details]</a></span>
IR file
On Sandy Bridge or Ivy Bridge, disabling AVX can lead to faster parallelized
code when the output is unaligned.
Attaching a IR file. You can generate the AVX-enabled code using:
opt -mcpu=corei7-avx -S -O3 vect.ll | llc -O3 -mcpu=corei7-avx
You can generate the AVX-disabled code using:
opt -mcpu=corei7-avx -mattr=-avx -S -O3 vect.ll | llc -O3 -mcpu=corei7-avx
-mattr=-avx
The main AVX loop looks like the following:
.LBB0_6: # %vector.body
# =>This Inner Loop Header: Depth=1
vmovupd -96(%rcx), %xmm0
vinsertf128 $1, -80(%rcx), %ymm0, %ymm0
vmovupd -64(%rcx), %xmm1
vinsertf128 $1, -48(%rcx), %ymm1, %ymm1
vmovupd -32(%rcx), %xmm2
vinsertf128 $1, -16(%rcx), %ymm2, %ymm2
vmovupd (%rcx), %xmm3
vinsertf128 $1, 16(%rcx), %ymm3, %ymm3
vmovupd -96(%rsi), %xmm4
vinsertf128 $1, -80(%rsi), %ymm4, %ymm4
vmovupd -64(%rsi), %xmm5
vinsertf128 $1, -48(%rsi), %ymm5, %ymm5
vmovupd -32(%rsi), %xmm6
vinsertf128 $1, -16(%rsi), %ymm6, %ymm6
vmovupd (%rsi), %xmm7
vinsertf128 $1, 16(%rsi), %ymm7, %ymm7
vaddpd %ymm4, %ymm0, %ymm0
vaddpd %ymm5, %ymm1, %ymm1
vaddpd %ymm6, %ymm2, %ymm2
vaddpd %ymm7, %ymm3, %ymm3
vextractf128 $1, %ymm0, -80(%rdx)
vmovupd %xmm0, -96(%rdx)
vextractf128 $1, %ymm1, -48(%rdx)
vmovupd %xmm1, -64(%rdx)
vextractf128 $1, %ymm2, -16(%rdx)
vmovupd %xmm2, -32(%rdx)
vextractf128 $1, %ymm3, 16(%rdx)
vmovupd %xmm3, (%rdx)
subq $-128, %rdx
subq $-128, %rsi
subq $-128, %rcx
addq $-16, %rdi
jne .LBB0_6
I'm not an expect, so I can't really say what the cause is, but it looks a bit
strange that the output array is not written to sequentially (-80(%rdx) then
-96(%rdx) then -48(%rdx) etc.).
This is with 3.6rc1 as well as 3.5.</pre>
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