<html>
    <head>
      <base href="http://llvm.org/bugs/" />
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - MachineCSE adds bogosity to MachineOperand flags"
   href="http://llvm.org/bugs/show_bug.cgi?id=22439">22439</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>MachineCSE adds bogosity to MachineOperand flags
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>All
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Core LLVM classes
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>grosbach@apple.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvmbugs@cs.uiuc.edu
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Consider test/CodeGen/AArch64/arm64-cse.ll run under the machine verifier:

*** Bad machine code: Virtual register def doesn't dominate all uses. ***
- function:    t2
- basic block: BB#0 entry (0x7faeab8489b0)
- instruction: %vreg8<def,dead> = SUBSWri %vreg6, 1, 0, %NZCV<imp-def>;
GPR32:%vreg8 GPR32common:%vreg6
LLVM ERROR: Found 1 machine code errors.

This is complaining about:
BB#0: derived from LLVM BB %entry
    Live Ins: %X0 %X1
...
    %vreg8<def,dead> = SUBSWri %vreg6, 1, 0, %NZCV<imp-def>; GPR32:%vreg8
GPR32common:%vreg6
    Bcc 10, <BB#1>, %NZCV<imp-use>
    Successors according to CFG: BB#3(12) BB#1(20)
...

BB#1: derived from LLVM BB %if.end
    Predecessors according to CFG: BB#0
    STRWui %vreg8, %vreg4, 0; mem:ST4[%offset] GPR32:%vreg8 GPR64common:%vreg4
...

%vreg8 is marked as a dead def, but the store in BB#1 is using it.

That block used to have:
            %vreg9<def> = SUBSWri %vreg0, 1, 0, %NZCV<imp-def,dead>;
GPR32:%vreg9 GPR32sp:%vreg0
            STRWui %vreg9, %vreg4, 0; mem:ST4[%offset] GPR32:%vreg9
GPR64common:%vreg4

MachineCSE recognized that the SUBSWri can be deleted and the value from BB#0
used instead; however, it neglects to update the "dead" flag on %vreg8 when it
does so, and thus introduces bogusness.</pre>
        </div>
      </p>
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