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    <head>
      <base href="http://llvm.org/bugs/" />
    </head>
    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - PowerPC inline assembly "=&r" constraint failing"
   href="http://llvm.org/bugs/show_bug.cgi?id=21452">21452</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>PowerPC inline assembly "=&r" constraint failing
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: PowerPC
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>anton@samba.org
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvmbugs@cs.uiuc.edu
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>Created <span class=""><a href="attachment.cgi?id=13272" name="attach_13272" title="Inline assembly testcase">attachment 13272</a> <a href="attachment.cgi?id=13272&action=edit" title="Inline assembly testcase">[details]</a></span>
Inline assembly testcase

The attached testcase built with -O2 -mcpu=power7 is buggy.

        asm volatile("  lwsync\n"
                     "1:        lwarx   %0,0,%1         # atomic_dec_return\n"
                     "  addic   %0,%0,-1\n"
                     "  stwcx.  %0,0,%1\n"
                     "  bne-    1b\n"
                     "  sync\n"
                     :"=&r"(t)
                     :"r"(&v->counter)
                     :"cr0", "xer", "memory");

"=&r" should be enough to prevent t and v->counter ending up in the same
register, but it does:

1:    lwarx    30,0,30        # atomic_dec_return
    addic    30,30,-1
    stwcx.    30,0,30</pre>
        </div>
      </p>
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