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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Homegeneous aggregates with C++ base classes passed incorrectly on PPC64, ARM, and Aarch64"
href="http://llvm.org/bugs/show_bug.cgi?id=21398">21398</a>
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<th>Summary</th>
<td>Homegeneous aggregates with C++ base classes passed incorrectly on PPC64, ARM, and Aarch64
</td>
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<th>Product</th>
<td>clang
</td>
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<th>Version</th>
<td>unspecified
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Windows NT
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>LLVM Codegen
</td>
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<th>Assignee</th>
<td>unassignedclangbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>rnk@google.com
</td>
</tr>
<tr>
<th>CC</th>
<td>david.majnemer@gmail.com, james.molloy@arm.com, llvmbugs@cs.uiuc.edu, t.p.northover@gmail.com
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<th>Classification</th>
<td>Unclassified
</td>
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<p>
<div>
<pre>Consider:
struct Base {
int x;
};
struct HVA : Base {
double y, z;
};
void f(HVA x);
extern HVA h;
void g() {
f(h);
}
On ARM, Clang will pass this in r0, d0, and d1, but gcc will pass in r0-r5.
AArch64 uses the same code and PPC64 looks like it is duplicated from the same
routine, so I'm sure they have similar issues.
Back on 3.4 when we used to do record flattening, we would completely screw
this up and would only pass the two doubles. Currently we just misclassify, but
we pass all the data.
IMO we should refactor the homogeneous aggregate calculation code to accept an
architecture. There's more complexity in walking Clang types than there is in
the target-specific logic.</pre>
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</p>
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