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    <head>
      <base href="http://llvm.org/bugs/" />
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    <body><table border="1" cellspacing="0" cellpadding="8">
        <tr>
          <th>Bug ID</th>
          <td><a class="bz_bug_link 
          bz_status_NEW "
   title="NEW --- - rL213897 introduced a regression on 32-bit code due to SEXTLOAD not utilized"
   href="http://llvm.org/bugs/show_bug.cgi?id=20767">20767</a>
          </td>
        </tr>

        <tr>
          <th>Summary</th>
          <td>rL213897 introduced a regression on 32-bit code due to SEXTLOAD not utilized
          </td>
        </tr>

        <tr>
          <th>Product</th>
          <td>libraries
          </td>
        </tr>

        <tr>
          <th>Version</th>
          <td>trunk
          </td>
        </tr>

        <tr>
          <th>Hardware</th>
          <td>PC
          </td>
        </tr>

        <tr>
          <th>OS</th>
          <td>Linux
          </td>
        </tr>

        <tr>
          <th>Status</th>
          <td>NEW
          </td>
        </tr>

        <tr>
          <th>Severity</th>
          <td>normal
          </td>
        </tr>

        <tr>
          <th>Priority</th>
          <td>P
          </td>
        </tr>

        <tr>
          <th>Component</th>
          <td>Backend: X86
          </td>
        </tr>

        <tr>
          <th>Assignee</th>
          <td>unassignedbugs@nondot.org
          </td>
        </tr>

        <tr>
          <th>Reporter</th>
          <td>zinovy.nis@gmail.com
          </td>
        </tr>

        <tr>
          <th>CC</th>
          <td>llvmbugs@cs.uiuc.edu
          </td>
        </tr>

        <tr>
          <th>Classification</th>
          <td>Unclassified
          </td>
        </tr></table>
      <p>
        <div>
        <pre>rL213897 (<a href="http://reviews.llvm.org/rL213897">http://reviews.llvm.org/rL213897</a>) introduced a significant regression
for 32bit code.

<span class="quote">> llc -march=x86 -mcpu=core-avx2 -O2 -o - test.ll</span >

; test.ll
define <4 x i32> @sextload(<4 x i16>* %ptr).
{
entry:
    %l = load<4 x i16>* %ptr
    %m = sext<4 x i16> %l to <4 x i32>
    ret <4 x i32> %m
}

is compiled into:

        movl    4(%esp), %eax
        movswl  2(%eax), %ecx
        movswl  (%eax), %edx
        vmovd   %edx, %xmm0
        vpinsrd $1, %ecx, %xmm0, %xmm0
        movswl  4(%eax), %ecx
        vpinsrd $2, %ecx, %xmm0, %xmm0
        movswl  6(%eax), %eax
        vpinsrd $3, %eax, %xmm0, %xmm0
        retl

Note lots of insert instructions. These instructions appeared due to 

    if (Subtarget->is64Bit()) {
      setLoadExtAction(ISD::SEXTLOAD, MVT::v4i16, Custom);
      setLoadExtAction(ISD::SEXTLOAD, MVT::v8i8, Custom);
    }

in lib/Target/X86/X86ISelLowering.cpp.

Eliminating "if", we get:

        movl    4(%esp), %eax
        vpmovsxwd       (%eax), %xmm0
        retl

which is optimal.</pre>
        </div>
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