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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Incorrect disassembly of X86 INT opcode"
href="http://llvm.org/bugs/show_bug.cgi?id=20252">20252</a>
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<tr>
<th>Summary</th>
<td>Incorrect disassembly of X86 INT opcode
</td>
</tr>
<tr>
<th>Product</th>
<td>libraries
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Linux
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
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<th>Component</th>
<td>Backend: X86
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>mattia.fazzini@gmail.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>The destination operand of x86 INT n opcode specifies an interrupt vector
number from 0 to 255, encoded as an 8-bit unsigned intermediate value. The X86
disassembler of LLVM treats the 8-bit value as a sign-extend value.
I think the following code:
static void translateImmediate(MCInst &mcInst, uint64_t immediate,
const OperandSpecifier &operand,
InternalInstruction &insn,
const MCDisassembler *Dis) {
...
case ENCODING_IB:
// Special case those X86 instructions that use the imm8 as a set of
// bits, bit count, etc. and are not sign-extend.
if (Opcode != X86::BLENDPSrri && Opcode != X86::BLENDPDrri &&
Opcode != X86::PBLENDWrri && Opcode != X86::MPSADBWrri &&
Opcode != X86::DPPSrri && Opcode != X86::DPPDrri &&
Opcode != X86::INSERTPSrr && Opcode != X86::VBLENDPSYrri &&
Opcode != X86::VBLENDPSYrmi && Opcode != X86::VBLENDPDYrri &&
Opcode != X86::VBLENDPDYrmi && Opcode != X86::VPBLENDWrri &&
Opcode != X86::VMPSADBWrri && Opcode != X86::VDPPSYrri &&
Opcode != X86::VDPPSYrmi && Opcode != X86::VDPPDrri &&
Opcode != X86::VINSERTPSrr)
...
}
should be changed to:
static void translateImmediate(MCInst &mcInst, uint64_t immediate,
const OperandSpecifier &operand,
InternalInstruction &insn,
const MCDisassembler *Dis) {
...
case ENCODING_IB:
// Special case those X86 instructions that use the imm8 as a set of
// bits, bit count, etc. and are not sign-extend.
if (Opcode != X86::BLENDPSrri && Opcode != X86::BLENDPDrri &&
Opcode != X86::PBLENDWrri && Opcode != X86::MPSADBWrri &&
Opcode != X86::DPPSrri && Opcode != X86::DPPDrri &&
Opcode != X86::INSERTPSrr && Opcode != X86::VBLENDPSYrri &&
Opcode != X86::VBLENDPSYrmi && Opcode != X86::VBLENDPDYrri &&
Opcode != X86::VBLENDPDYrmi && Opcode != X86::VPBLENDWrri &&
Opcode != X86::VMPSADBWrri && Opcode != X86::VDPPSYrri &&
Opcode != X86::VDPPSYrmi && Opcode != X86::VDPPDrri &&
Opcode != X86::VINSERTPSrr && Opcode !=X86::INT)
...
}</pre>
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