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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [ARM64] Unable to emit UBFX in some cases"
href="http://llvm.org/bugs/show_bug.cgi?id=19589">19589</a>
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<th>Summary</th>
<td>[ARM64] Unable to emit UBFX in some cases
</td>
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<th>Product</th>
<td>new-bugs
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>weimingz@codeaurora.org
</td>
</tr>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
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<p>
<div>
<pre>For example:
Given
@arr = external global [8 x [64 x i64]]
define i64 @fct21(i64 %x) {
entry:
%shr = lshr i64 %x, 4
%and = and i64 %shr, 15
%arrayidx = getelementptr inbounds [8 x [64 x i64]]* @arr, i64 0, i64 2, i64
and
%0 = load i64* %arrayidx, align 8
ret i64 %0
}
both ARM64 and AArch64 are unable to emit ubfx, which results into 1 more
instruction emitted.
The above code generates:
lsr x8, x0, #1
and x8, x8, #0x78
adrp x9, arr
add x9, x9, :lo12:arr
add x8, x9, x8
ldr x0, [x8, #1024]
ret
Ideally, it should be
ubfx x8, x0, #4, #4
adrp x9, arr
add x9, x9, :lo12:arr
add x8, x9, x8, lsl #3
ldr x0, [x8, #1024]
ret
This is because for patterns like like ((x>> 8) & 0x1f) << 3 + y, inst combine
changes it to
[x>>(8-3) & (0x1f << 3)] + y
that is
lsr x8, x0, 5
and x8, x1, 0xf8
add x0, x8, x1 (here we lose the chance to fold shift into add)
so if ubfx is used , it would be
ubfx x0, x0, 8, 5
add x0, x1, x0, lsl 3
The reason is during dag combining, the target independent combining folds SHL
with the bit extraction, which makes the following pass harder to recognize the
bit extraction.</pre>
</div>
</p>
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