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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - __sync_fetch_and_or with power-of-two argument should generate "lock bts" code"
href="http://llvm.org/bugs/show_bug.cgi?id=19164">19164</a>
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<th>Summary</th>
<td>__sync_fetch_and_or with power-of-two argument should generate "lock bts" code
</td>
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: X86
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>hans@chromium.org
</td>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>For
unsigned f(unsigned *addr) {
return __sync_fetch_and_or(addr, 1 << 7) & (1 << 7);
}
We currently generate:
f:
movl (%rdi), %eax
.LBB0_1:
movl $128, %ecx
orl %eax, %ecx
lock
cmpxchgl %ecx, (%rdi)
jne .LBB0_1
andl $128, %eax
retq
It would be cool if we could recognize that the read-modify-write we're doing
here is actually bit-test-and-set, which can be done with the bts instruction.</pre>
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