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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - [AArch32] VSel causes ICE from optimizeCompareInstr"
href="http://llvm.org/bugs/show_bug.cgi?id=18149">18149</a>
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<th>Summary</th>
<td>[AArch32] VSel causes ICE from optimizeCompareInstr
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
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<th>OS</th>
<td>Windows NT
</td>
</tr>
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<th>Status</th>
<td>NEW
</td>
</tr>
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<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
</tr>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
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<th>Reporter</th>
<td>weimingz@codeaurora.org
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
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<div>
<pre>Created <span class=""><a href="attachment.cgi?id=11673" name="attach_11673" title="test case">attachment 11673</a> <a href="attachment.cgi?id=11673&action=edit" title="test case">[details]</a></span>
test case
To reproduce:
llc < test.ll
llc:
/prj/llvm-arm/home/nightly/src/community-mainline/llvm/include/llvm/CodeGen/MachineOperand.h:403:
int64_t llvm::MachineOperand::getImm() const: Assertion `isImm() && "Wrong
MachineOperand accessor"' failed.
0 llc 0x0000000000e015e2 llvm::sys::PrintStackTrace(_IO_FILE*) +
34
1 llc 0x0000000000e02aca
2 libpthread.so.0 0x00007fa18dca78f0
3 libc.so.6 0x00007fa18cb4ba75 gsignal + 53
4 libc.so.6 0x00007fa18cb4f5c0 abort + 384
5 libc.so.6 0x00007fa18cb44941 __assert_fail + 241
6 llc 0x000000000055be51
7 llc 0x0000000000562fa0
llvm::ARMBaseInstrInfo::optimizeCompareInstr(llvm::MachineInstr*, unsigned int,
unsigned int, int, int, llvm::MachineRegisterInfo const*) const + 2128
8 llc 0x00000000009e6c0e
9 llc 0x00000000009e8812
10 llc 0x0000000000d91038
llvm::FPPassManager::runOnFunction(llvm::Function&) + 568
11 llc 0x0000000000d9111b
llvm::FPPassManager::runOnModule(llvm::Module&) + 43
12 llc 0x0000000000d90b4c
llvm::legacy::PassManagerImpl::run(llvm::Module&) + 892
13 llc 0x0000000000505102
14 llc 0x0000000000505cd5 main + 261
15 libc.so.6 0x00007fa18cb36c4d __libc_start_main + 253
Reason:
The current peephole optimizing for compare inst assumes an instr that
uses CPSR has an MO for ARM Cond code.However, for VSEL instructions
(vseqeq, vselgt, vselgt, vselvs), there is no such operand nor do
they support the modification of Cond Code.
Patch will be sent to maillist for review</pre>
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