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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Double store/load instructions don't support optional register arguments"
href="http://llvm.org/bugs/show_bug.cgi?id=18103">18103</a>
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<th>Summary</th>
<td>Double store/load instructions don't support optional register arguments
</td>
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<th>Product</th>
<td>libraries
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Backend: ARM
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>joerg@NetBSD.org
</td>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
</td>
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<p>
<div>
<pre>For example:
strexd r4, r0, [ip]
is rejected and needs to be written as
strexd r4, r0, r1, [ip]
Official ARM documents mark the r1 register as optional. It would be nice to
support this properly.</pre>
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