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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Add support for ldr pseudo instruction in ARM integrated assembler"
href="http://llvm.org/bugs/show_bug.cgi?id=17769">17769</a>
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<th>Summary</th>
<td>Add support for ldr pseudo instruction in ARM integrated assembler
</td>
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<th>Product</th>
<td>tools
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>llc
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>dpeixott@codeaurora.org
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</tr>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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</tr>
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<th>Classification</th>
<td>Unclassified
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</tr></table>
<p>
<div>
<pre>Both armasm and gnu as support an ldr pseudo instruction for loading constants
that lowers to either a mov, movn, or a pc-relative ldr from the constant pool.
For example, compiling this assembly with gnu as:
.text
foo:
ldr r0, =0x1
ldr r0, =-0x1
ldr r0, =0x1000001
ldr r0, =bar
ldr r0, =baz
bar:
Produces an object file like this (with relocations shown):
Disassembly of section .text:
00000000 <foo>:
0: e3a00001 mov r0, #1
4: e3e00000 mvn r0, #0
8: e59f0004 ldr r0, [pc, #4] ; 14 <bar>
c: e59f0004 ldr r0, [pc, #4] ; 18 <bar+0x4>
10: e59f0004 ldr r0, [pc, #4] ; 1c <bar+0x8>
00000014 <bar>:
14: 01000001 .word 0x01000001
18: 00000014 .word 0x00000014
18: R_ARM_ABS32 .text
1c: 00000000 .word 0x00000000
1c: R_ARM_ABS32 baz
Currently the llvm integrated assembler fails on this input with an error like:
error: unexpected token in operand
ldr r0, =0x1
^
After discussion on the llvm-dev list (see thread started here:
<a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-October/066808.html">http://lists.cs.uiuc.edu/pipermail/llvmdev/2013-October/066808.html</a>), the
community supports adding this feature to the integrated assembler.</pre>
</div>
</p>
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