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<base href="http://llvm.org/bugs/" />
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<body><table border="1" cellspacing="0" cellpadding="8">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Fix A9 instruction scheduling using the new machine model."
href="http://llvm.org/bugs/show_bug.cgi?id=17593">17593</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>Fix A9 instruction scheduling using the new machine model.
</td>
</tr>
<tr>
<th>Product</th>
<td>new-bugs
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>new bugs
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>atrick@apple.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Source:
#define N 2000000
static double b[N], c[N];
void Scale () {
double scalar = 3.0;
for (int j=0;j<N;j++)
b[j] = scalar*c[j];
}
$clang -O3 foo.c -static -S -o foo.s -mllvm -unroll-count=4 -mcpu=cortex-a9
-fno-vectorize -fno-slp-vectorize --target=arm -mfloat-abi=hard -mllvm
-enable-misched -mllvm -scheditins=false
per-operand cost model :
Scale:
push {lr}
movw r12, :lower16:c
movw lr, :lower16:b
movw r3, #9216
movt r12, :upper16:c
mov r1, #0
vmov.f64 d16, #3.000000e+00
movt lr, :upper16:b
movt r3, #244
.LBB0_1:
add r0, r12, r1
add r2, lr, r1
vldr d17, [r0]
add r1, r1, #32
vmul.f64 d17, d17, d16
cmp r1, r3
vstr d17, [r2]
vldr d17, [r0, #8]
vmul.f64 d17, d17, d16
vstr d17, [r2, #8]
vldr d17, [r0, #16]
vmul.f64 d17, d17, d16
vstr d17, [r2, #16]
vldr d17, [r0, #24]
vmul.f64 d17, d17, d16
vstr d17, [r2, #24]
bne .LBB0_1
pop {lr}
bx lr
.Ltmp0:
Using Itinerary will generate better scheduled code:
clang -O3 foo.c -static -S -o foo.s -mllvm -unroll-count=4 -mcpu=cortex-a9
-fno-vectorize -fno-slp-vectorize --target=arm -mfloat-abi=hard -mllvm
-enable-misched
Scale:
movw r12, :lower16:c
movw r2, :lower16:b
movw r3, #9216
movt r12, :upper16:c
mov r1, #0
vmov.f64 d16, #3.000000e+00
movt r2, :upper16:b
movt r3, #244
.LBB0_1:
add r0, r12, r1
vldr d17, [r0]
vldr d18, [r0, #8]
vmul.f64 d17, d17, d16
vldr d19, [r0, #16]
vldr d20, [r0, #24]
add r0, r2, r1
vmul.f64 d18, d18, d16
add r1, r1, #32
cmp r1, r3
vmul.f64 d19, d19, d16
vmul.f64 d20, d20, d16
vstmia r0, {d17, d18, d19, d20}
bne .LBB0_1
bx lr</pre>
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