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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - Enable subregister liveness for scheduling and register allocation."
href="http://llvm.org/bugs/show_bug.cgi?id=17557">17557</a>
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<th>Summary</th>
<td>Enable subregister liveness for scheduling and register allocation.
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<th>Product</th>
<td>new-bugs
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
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<th>OS</th>
<td>All
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<th>Status</th>
<td>NEW
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>new bugs
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>atrick@apple.com
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
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<p>
<div>
<pre>These are the remaining steps to get Matthias' subregister liveness fully
integrated:
- Fix LiveRegUnits to correctly handle regmasks.
- Benchmark/tune compile time.
- Enable subreg liveness on x86 for testing purposes.
- Use LiveRegUnits to fix ARM VMOV widening.
- Fix the scheduler's DAG builder to use bundler iterator, not operand index.
- Discard the master live range after coalescing so that LiveInterval updates
don't need to preserve it when we reorder subregister defs.
- Enable subreg scheduling on all targets that enable MI scheduler.</pre>
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