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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - ARM: Coalescing (or missed coalescing) prevents paired load to be formed"
href="http://llvm.org/bugs/show_bug.cgi?id=16396">16396</a>
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<th>Summary</th>
<td>ARM: Coalescing (or missed coalescing) prevents paired load to be formed
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<th>Product</th>
<td>libraries
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>Other
</td>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>enhancement
</td>
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<th>Priority</th>
<td>P
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<th>Component</th>
<td>Register Allocator
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>qcolombet@apple.com
</td>
</tr>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
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</tr></table>
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<div>
<pre>Created <span class=""><a href="attachment.cgi?id=10718" name="attach_10718" title="test case to reproduce">attachment 10718</a> <a href="attachment.cgi?id=10718&action=edit" title="test case to reproduce">[details]</a></span>
test case to reproduce
To form a paired load on ARM, the loaded registers must form a pair, i.e., let
ri be the first loaded register, the second loaded register must be ri+1.
When coalescing comes into play, the register allocator may choose a register
for one of the result that prevents to find a matching pair for the other or
choose a register that does not match the pair of the already assigned one.
The attached test.ll demonstrates an even more subtle case where the coalescer
would have help in finding the right pair if it was able to coalesce
everything.
* CHECK AGAINST
r184492
* STEP TO REPRODUCE
Download test.ll
llc test.ll -mtriple=armv7-none-linux-gnueabi -o -
* RESULT
[...]
ldr r2, [r0] // <- coalesced with r2
ldr r1, [r0, #4] // <- failed to coalesced with r3
movw r0, #555
mov r3, r1 // <- missed coalescing
The missed coalescing opportunity prevents to generate a paired load with r2
and r3.
Looking into the details, the paired load is formed before register allocation
by ARMPreAllocLoadStoreOpt pass (LDRD instruction).
Then, the register allocator chooses to not satisfy the affinity for the second
result of the LDRD (vreg4 in the regalloc dump) and picks r1 (I guess to not
over constraint the choices for the whole pair, it choose the first available
color). Later, it assigns the register for the first result of the LDRD (vreg3)
and here it chooses to coalesce to r2, thus breaking the pair constraint.
I know this is a tricky problem in the general case (n-uple), but we may be
able to do something for the paired case. One may for instance decide not to
coalesce the second matched result if it breaks the pairing constraints.</pre>
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