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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - A error on VSELECT Dagcombiner with some architecture"
href="http://llvm.org/bugs/show_bug.cgi?id=16165">16165</a>
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<th>Summary</th>
<td>A error on VSELECT Dagcombiner with some architecture
</td>
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<th>Product</th>
<td>new-bugs
</td>
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<th>Version</th>
<td>trunk
</td>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>jaykang10@gmail.com
</td>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
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<p>
<div>
<pre>I met the error while compiling the code with vector type with some
architecture. IR is as following:
define <3 x i8> @test (<3 x i8> %x) #0 {
entry:
%cmp = icmp sgt <3 x i8> %x, zeroinitializer
%sub = sub <3 x i8> zeroinitializer, %x
%cond = select <3 x i1> %cmp, <3 x i8> %x, <3 x i8> %sub
ret <3 x i8> %cond
}
I tested this IR code with llc as follows:
llc -march=arm ./test.ll -o ./test.s
llc -march=mips ./test.ll -o ./test.s
'select' IR is converted to 'vselect' dag and is combined to 'sra (X,
size(X)-1); xor (add (X, Y), Y)'. There is a problem here. If the target
support i8 type as promote integer to make size(X), size(X) has i32 type. and
then type legalize pass do widening the vector like this.
v4i8 = BUILD_VECTOR 0x99d90a8: i32 = Constant<7> [ID=-3], 0x99d90a8: i32 =
Constant<7> [ID=-3], 0x99d90a8: i32 = Constant<7> [ID=-3], 0x9a6c6c8: i8 =
undef
In the end, type legalizer generates a error like this "Operands must all have
the same type".</pre>
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