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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - inefficient code generation for 128-bit->256-bit typecast intrinsics"
href="http://llvm.org/bugs/show_bug.cgi?id=15712">15712</a>
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<th>Summary</th>
<td>inefficient code generation for 128-bit->256-bit typecast intrinsics
</td>
</tr>
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<th>Product</th>
<td>new-bugs
</td>
</tr>
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<th>Version</th>
<td>trunk
</td>
</tr>
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<th>Hardware</th>
<td>PC
</td>
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<th>OS</th>
<td>Linux
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
</tr>
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<th>Priority</th>
<td>P
</td>
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<th>Component</th>
<td>new bugs
</td>
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<th>Assignee</th>
<td>unassignedbugs@nondot.org
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<th>Reporter</th>
<td>katya_romanova@playstation.sony.com
</td>
</tr>
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<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
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<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>LLVM generates two additional instructions for 128->256 bit typecasts
(e.g. _mm256_castsi128_si256, _mm256_castps128_ps256, _mm256_castpd128_pd256)
to clear out the upper 128 bits of YMM register corresponding to source XMM
register.
vxorps xmm2,xmm2,xmm2
vinsertf128 ymm0,ymm2,xmm0,0x0
Most of the industry-standard C/C++ compilers (GCC, Intel’s compiler, Visual
Studio compiler) don’t generate any extra moves for 128-bit->256-bit typecast
intrinsics. None of these compilers zero-extend the upper 128 bits of the
256-bit YMM register. Intel’s documentation for the _mm256_castsi128_si256
intrinsic explicitly states that “the upper bits of the resulting vector are
undefined” and that “this intrinsic does not introduce extra moves to the
generated code”.
<a href="http://software.intel.com/sites/products/documentation/studio/composer/en-us/2011Update/compiler_c/intref_cls/common/intref_avx_castsi128_si256.htm">http://software.intel.com/sites/products/documentation/studio/composer/en-us/2011Update/compiler_c/intref_cls/common/intref_avx_castsi128_si256.htm</a>
Clang implements these typecast intrinsics differently. I suspect that this was
done on purpose to avoid a hardware penalty caused by partial register writes.
I think that the overall cost of 2 additional instructions (vxor + vinsertf128)
for *every* 128-bit->256-bit typecast intrinsic much higher than the hardware
penalty caused by partial register writes for *rare* cases when the upper part
of YMM register corresponding to a source XMM register is not cleared already.
Katya.</pre>
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