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<base href="http://llvm.org/bugs/" />
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW --- - ARM Code GEN ICE on LoopVectorize'd code containing float cosine function"
href="http://llvm.org/bugs/show_bug.cgi?id=15416">15416</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>ARM Code GEN ICE on LoopVectorize'd code containing float cosine function
</td>
</tr>
<tr>
<th>Product</th>
<td>tools
</td>
</tr>
<tr>
<th>Version</th>
<td>trunk
</td>
</tr>
<tr>
<th>Hardware</th>
<td>PC
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>enhancement
</td>
</tr>
<tr>
<th>Priority</th>
<td>P
</td>
</tr>
<tr>
<th>Component</th>
<td>llc
</td>
</tr>
<tr>
<th>Assignee</th>
<td>unassignedbugs@nondot.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>aschwaighofer@apple.com
</td>
</tr>
<tr>
<th>CC</th>
<td>llvmbugs@cs.uiuc.edu
</td>
</tr>
<tr>
<th>Classification</th>
<td>Unclassified
</td>
</tr></table>
<p>
<div>
<pre>Release+Asserts/bin/clang -O3 -mcpu=swift -fvectorize -arch armv7 -isysroot
/Applications/TestXcodes/Xcode.app/Contents/Developer/Platforms/iPhoneOS.platform/Developer/SDKs/iPhoneOS6.1.sdk
testfcos.c -S
cat > testfcos.c
#include <math.h>
int test(double *dvec1, double *dvec2, int size) {
int i;
for( i = 0; i < 128; i++ ) {
dvec1[i] = 1.0000001 * cosf((float)(size - i));
dvec2[i] = 1.0 + 0.0000000001 * sinf((float)i);
}
}
fatal error: error in backend: Cannot select: 0x7ff59a11db10: v2f32 = fcos
0x7ff59a11dd10 [ORD=15] [ID=47]
0x7ff59a11dd10: v2f32 = sint_to_fp 0x7ff59a11c210 [ORD=14] [ID=44]
0x7ff59a11c210: v2i32 = sub 0x7ff59a11d510, 0x7ff59a11c810 [ORD=13] [ID=42]
0x7ff59a11d510: v2i32,ch = CopyFromReg 0x7ff599c4b598, 0x7ff59a11de10
[ORD=13] [ID=24]
0x7ff59a11de10: v2i32 = Register %vreg0 [ORD=13] [ID=6]
0x7ff59a11c810: v2i32 = add 0x7ff59a124310, 0x7ff59a122a10 [ORD=12]
[ID=40]
0x7ff59a124310: v2i32 = ARMISD::VDUP 0x7ff59a11da10 [ID=30]
0x7ff59a11da10: i32,ch = CopyFromReg 0x7ff599c4b598, 0x7ff59a11df10
[ORD=10] [ID=23]
0x7ff59a11df10: i32 = Register %vreg3 [ORD=10] [ID=3]
0x7ff59a122a10: v2i32 = bitcast 0x7ff59a11bf10 [ID=39]
0x7ff59a11bf10: f64,ch = load 0x7ff599c4b598, 0x7ff59a120d10,
0x7ff59a11bc10<LD8[ConstantPool]> [ID=34]
0x7ff59a120d10: i32 = ARMISD::Wrapper 0x7ff59a11d710 [ID=27]
0x7ff59a11d710: i32 = TargetConstantPool<<2 x i32> <i32 0, i32
1>> 0 [ID=20]
0x7ff59a11bc10: i32 = undef [ORD=18] [ID=7]
Is the TargetLowering/TargetTransformInfo code going wrong?</pre>
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