[llvm-bugs] [Bug 37798] New: [X86] Add support for X86ISD float2int constant folding
llvm-bugs at lists.llvm.org
Thu Jun 14 02:11:20 PDT 2018
Bug ID: 37798
Summary: [X86] Add support for X86ISD float2int constant
OS: Windows NT
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: llvm-dev at redking.me.uk
CC: andrea.dibiagio at gmail.com, craig.topper at gmail.com,
filcab at gmail.com, greg.bedwell at sony.com,
lebedev.ri at gmail.com, llvm-bugs at lists.llvm.org,
spatel+llvm at rotateright.com
Depends on: 37751
Split off from [Bug #37751].
Now that we've standardised to using X86ISD opcodes for float2int conversions:
// Vector float/double to signed/unsigned integer.
CVTP2SI, CVTP2UI, CVTP2SI_RND, CVTP2UI_RND,
// Scalar float/double to signed/unsigned integer.
// Vector float/double to signed/unsigned integer with truncation.
CVTTP2SI, CVTTP2UI, CVTTP2SI_RND, CVTTP2UI_RND,
// Scalar float/double to signed/unsigned integer with truncation.
We should investigate adding safe constant folding support to these. We could
at least support exact conversions (these should be rounding mode independent
for non-truncation instructions?).
For truncation instructions we can probably accept inexact conversions as well,
as long as no underflow/overflow occurs - this would need to be tested to
[Bug 37751] [X86] CVTTPD2DQ/CVTTPS2DQ intrinsics must not map to
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