[llvm-bugs] [Bug 35908] New: Single bit extract and add/sub could generate better code via carry bit

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=35908

            Bug ID: 35908
           Summary: Single bit extract and add/sub could generate better
                    code via carry bit
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: dave at znu.io
                CC: llvm-bugs at lists.llvm.org

Consider the following code, which is a reduction derived from a client of
llvm::TrailingObjects.

void dummy(int arg);
void test_add(int x, int y, int z) { dummy(bool(z & (1 << 30)) + x + y); }
void test_sub(int x, int y, int z) { dummy(bool(z & (1 << 30)) - x - y); }

On pre-BEXTR CPUs, the following code is emitted:

"test_add"
        shrl    $30, %edx
        andl    $1, %edx
        addl    %esi, %edi
        addl    %edx, %edi

"test_sub"
        shrl    $30, %edx
        andl    $1, %edx
        addl    %esi, %edi
        subl    %edi, %edx
        movl    %edx, %edi

And on BEXTR capable CPUs:

"test_add"
        movl    $286, %eax              # imm = 0x11E
        bextrl  %eax, %edx, %eax
        addl    %esi, %edi
        addl    %eax, %edi

"test_sub"
        movl    $286, %eax              # imm = 0x11E
        bextrl  %eax, %edx, %eax
        addl    %esi, %edi
        subl    %edi, %eax
        movl    %eax, %edi

But in practice, pre-BEXTR CPUs can generate the best code

"test_add"
        btl     $30, %edx
        adcl    %esi, %edx

"test_sub"
        btl     $30, %edx
        sbbl    %esi, %edx

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