[llvm-bugs] [Bug 35875] New: Arm regression for three way min/max

via llvm-bugs llvm-bugs at lists.llvm.org
Tue Jan 9 08:33:13 PST 2018


https://bugs.llvm.org/show_bug.cgi?id=35875

            Bug ID: 35875
           Summary: Arm regression for three way min/max
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: david.green at arm.com
                CC: llvm-bugs at lists.llvm.org

Created attachment 19647
  --> https://bugs.llvm.org/attachment.cgi?id=19647&action=edit
Reproducer

This is https://bugs.llvm.org/show_bug.cgi?id=35717, part 2.

The regression is fixed for x86, we just need to do the same for Arm.

This is a piece of code that at it's heart does a three way min (also
attached):

target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv8m.base-arm-none-eabi"
define void @test(i8* nocapture readonly, i8* nocapture) {
  %3 = getelementptr inbounds i8, i8* %0, i32 1
  %4 = load i8, i8* %0, align 1
  %5 = getelementptr inbounds i8, i8* %0, i32 2
  %6 = load i8, i8* %3, align 1
  %7 = load i8, i8* %5, align 1
  %8 = xor i8 %4, -1
  %9 = xor i8 %6, -1
  %10 = xor i8 %7, -1
  %11 = zext i8 %8 to i32
  %12 = zext i8 %9 to i32
  %13 = icmp ult i8 %6, %4
  %14 = zext i8 %10 to i32
  %15 = icmp ult i32 %11, %14
  %16 = select i1 %15, i32 %11, i32 %14
  %17 = icmp ult i32 %12, %14
  %18 = select i1 %17, i32 %12, i32 %14
  %19 = select i1 %13, i32 %16, i32 %18
  %20 = trunc i32 %19 to i8
  %21 = sub nsw i32 %11, %19
  %22 = trunc i32 %21 to i8
  %23 = sub nsw i32 %12, %19
  %24 = trunc i32 %23 to i8
  %25 = sub nsw i32 %14, %19
  %26 = trunc i32 %25 to i8
  %27 = getelementptr inbounds i8, i8* %1, i32 1
  store i8 %20, i8* %1, align 1
  %28 = getelementptr inbounds i8, i8* %1, i32 2
  store i8 %22, i8* %27, align 1
  %29 = getelementptr inbounds i8, i8* %1, i32 3
  store i8 %24, i8* %28, align 1
  store i8 %26, i8* %29, align 1
  ret void
}

Because i8 isn't a legal type we don't remove the zext/trunc's. And because the
negated values are also stored we do not fold the 3 selects into 2.

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