https://bugs.llvm.org/show_bug.cgi?id=39973
Bug ID: 39973
Summary: [DAGCombine] Scalarizing vector ops with low/one
demanded elements
Product: libraries
Version: trunk
Hardware: PC
OS: Windows NT
Status: NEW
Severity: enhancement
Priority: P
Component: Common Code Generator Code
Assignee: unassignedbugs at nondot.org
Reporter: llvm-dev at redking.me.uk
CC: andrea.dibiagio at gmail.com, llvm-bugs at lists.llvm.org,
spatel+llvm at rotateright.com
As mentioned in https://reviews.llvm.org/D55558
https://godbolt.org/z/-1CEbS
define i32 @knownbits_mask_extract_sext(<8 x i16> %a0) nounwind {
%1 = and <8 x i16> %a0, <i16 15, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16
-1, i16 -1>
%2 = extractelement <8 x i16> %1, i32 0
%3 = sext i16 %2 to i32
ret i32 %3
}
As this uses only a single element, should it be scalarized?
knownbits_mask_extract_sext: # @knownbits_mask_extract_sext
vpand .LCPI0_0(%rip), %xmm0, %xmm0
vpextrw $0, %xmm0, %eax
retq
knownbits_mask_extract_sext_alt: # @knownbits_mask_extract_sext_alt
vmovd %xmm0, %eax
andl $15, %eax
retq
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