[llvm-bugs] [Bug 34902] New: [ARM]Improve switch-case lowering when optimizing for code size

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=34902

            Bug ID: 34902
           Summary: [ARM]Improve switch-case lowering when optimizing for
                    code size
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: new bugs
          Assignee: gaborb at inf.u-szeged.hu
          Reporter: gaborb at inf.u-szeged.hu
                CC: eastig at yandex.ru, kristof.beyls at arm.com,
                    llvm-bugs at lists.llvm.org

GCC compiles to smaller switch-cases than LLVM when targeting ARM.

Example:

########
* Source
########

void func (int);

void foo (int a)
{
  switch(a)
  {
    case 15:
     func(5);
    case 16:
     func(59);
    case 17:
     func(515);
    case 18:
     func(65);
    case 19:
     func(8);
    case 20:
     func(15);
  }
}

#############################
* GCC v7.1 generated assembly
#############################

** Options: -Os -marm -march=armv7-a

foo:
        @ args = 0, pretend = 0, frame = 0
        @ frame_needed = 0, uses_anonymous_args = 0
        sub     r0, r0, #15
        push    {r4, lr}
        cmp     r0, #5
        ldrls   pc, [pc, r0, asl #2]
        b       .L1
.L4:
        .word   .L3
        .word   .L5
        .word   .L6
        .word   .L7
        .word   .L8
        .word   .L9
.L3:
        mov     r0, #5
        bl      func
.L5:
        mov     r0, #59
        bl      func
.L6:
        movw    r0, #515
        bl      func
.L7:
        mov     r0, #65
        bl      func
.L8:
        mov     r0, #8
        bl      func
.L9:
        mov     r0, #15
        pop     {r4, lr}
        b       func
.L1:
        pop     {r4, pc}

#############################
* LLVM 6.0 generated assembly
#############################

** Options: -Oz -marm -march=armv7-a

foo:
        .fnstart
@ BB#0:                                 @ %entry
        sub     r0, r0, #15
        cmp     r0, #5
        bxhi    lr
        .save   {r11, lr}
        push    {r11, lr}
        .setfp  r11, sp
        mov     r11, sp
        adr     r1, .LJTI0_0
        lsl     r0, r0, #2
        ldr     pc, [r0, r1]
@ BB#1:
        .p2align        2
.LJTI0_0:
        .long   .LBB0_2
        .long   .LBB0_3
        .long   .LBB0_4
        .long   .LBB0_5
        .long   .LBB0_6
        .long   .LBB0_7
.LBB0_2:                                @ %sw.bb
        mov     r0, #5
        bl      func
.LBB0_3:                                @ %sw.bb1
        mov     r0, #59
        bl      func
.LBB0_4:                                @ %sw.bb2
        movw    r0, #515
        bl      func
.LBB0_5:                                @ %sw.bb3
        mov     r0, #65
        bl      func
.LBB0_6:                                @ %sw.bb4
        mov     r0, #8
        bl      func
.LBB0_7:                                @ %sw.bb5
        mov     r0, #15
        pop     {r11, lr}
        b       func

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