[llvm-bugs] [Bug 33026] New: eliminate concat and extract ops with narrower vector ops

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=33026

            Bug ID: 33026
           Summary: eliminate concat and extract ops with narrower vector
                    ops
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Transformation Utilities
          Assignee: unassignedbugs at nondot.org
          Reporter: spatel+llvm at rotateright.com
                CC: llvm-bugs at lists.llvm.org

I was investigating a backend fix for this kind of thing, but it could also be
solved in IR (although I'm not sure which pass):

define <4 x i32> @do_not_use_256bit_op(<4 x i32> %a, <4 x i32> %b, <4 x i32>
%c, <4 x i32> %d) {
  %concat1 = shufflevector <4 x i32> %a, <4 x i32> %b, <8 x i32> <i32 0, i32 1,
i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %concat2 = shufflevector <4 x i32> %c, <4 x i32> %d, <8 x i32> <i32 0, i32 1,
i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
  %and = and <8 x i32> %concat1, %concat2
  %extract1 = shufflevector <8 x i32> %and, <8 x i32> undef, <4 x i32> <i32 0,
i32 1, i32 2, i32 3>
  %extract2 = shufflevector <8 x i32> %and, <8 x i32> undef, <4 x i32> <i32 4,
i32 5, i32 6, i32 7>
  %sub = sub <4 x i32> %extract1, %extract2
  ret <4 x i32> %sub
}


This would be better as:

define <4 x i32> @do_not_use_256bit_op(<4 x i32> %a, <4 x i32> %b, <4 x i32>
%c, <4 x i32> %d) {
  %and1 = and <4 x i32> %a, %c  
  %and2 = and <4 x i32> %b, %d
  %sub = sub <4 x i32> %and1, %and2
  ret <4 x i32> %sub
}

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