[llvm-bugs] [Bug 33362] New: [X86] Instruction reordering prevents EFLAGS folding

[via llvm-bugs]

https://bugs.llvm.org/show_bug.cgi?id=33362

            Bug ID: 33362
           Summary: [X86] Instruction reordering prevents EFLAGS folding
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Windows NT
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: llvm-dev at redking.me.uk
                CC: andrea.dibiagio at gmail.com, davide at freebsd.org,
                    filcab at gmail.com, llvm-bugs at lists.llvm.org,
                    spatel+llvm at rotateright.com

https://godbolt.org/g/l1T1da

Swapping 2 instructions over prevents the folding of an EFLAGS result,
requiring an additional comparison to regenerate them. Ideally we'd recognise
which instructions are actually using the EFLAGS result:

define i32 @clz_i128(i64, i64)  {
  %3 = tail call i64 @llvm.ctlz.i64(i64 %1, i1 false)
  %4 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)
  %5 = icmp ne i64 %0, 0
  %6 = select i1 %5, i64 0, i64 %3
  %7 = add nuw nsw i64 %6, %4
  %8 = trunc i64 %7 to i32
  ret i32 %8
}
define i32 @clz_i128_swap(i64, i64)  {
  %3 = tail call i64 @llvm.ctlz.i64(i64 %0, i1 false)    <-- SWAP
  %4 = tail call i64 @llvm.ctlz.i64(i64 %1, i1 false)    <-- SWAP
  %5 = icmp ne i64 %0, 0
  %6 = select i1 %5, i64 0, i64 %4
  %7 = add nuw nsw i64 %6, %3
  %8 = trunc i64 %7 to i32
  ret i32 %8
}
declare i64 @llvm.ctlz.i64(i64, i1)

clz_i128:
        lzcntq  %rsi, %rcx
        xorl    %edx, %edx
        lzcntq  %rdi, %rax
        cmovael %edx, %ecx
        addl    %ecx, %eax
        retq
clz_i128_swap:
        lzcntq  %rdi, %rax
        lzcntq  %rsi, %rcx
        xorl    %edx, %edx
        testq   %rdi, %rdi    <-- EXTRA TEST
        cmovnel %edx, %ecx
        addl    %ecx, %eax
        retq

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