[llvm-bugs] [Bug 32023] New: Failure to recognize rotate when subtract and shifts are fed by truncates from different types

[via llvm-bugs]

http://bugs.llvm.org/show_bug.cgi?id=32023

            Bug ID: 32023
           Summary: Failure to recognize rotate when subtract and shifts
                    are fed by truncates from different types
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: craig.topper at gmail.com
                CC: llvm-bugs at lists.llvm.org

This sequence fails to generate a rotate instruction for x86 in 64-bit mode

define i16 @foo16(i16 %x, i16 %y, i16 %z) nounwind readnone {
entry:
        %0 = shl i16 %x, %z
        %1 = sub i16 16, %z
        %2 = lshr i16 %x, %1
        %3 = or i16 %2, %0
        ret i16 %3
}

The %x and %y arguments are passed as i32 values and then truncated to i16 for
the LHS of the shifts. The shift amount is also passed as an i32, but is
truncated to i8 for the shift amount on the left shift. For the right shift we
first truncate %z to i16, subtract from 16, then truncate again to i8.

The rotate matching in DAGCombine looks through the truncates to i8, but fails
to look through the truncate of %z to i16 feeding the sub.

Here's the initial DAG for this case:

Initial selection DAG: BB#0 'foo16:entry'
SelectionDAG has 21 nodes:
  t0: ch = EntryToken
    t2: i32,ch = CopyFromReg t0, Register:i32 %vreg0
  t3: i16 = truncate t2
    t5: i32,ch = CopyFromReg t0, Register:i32 %vreg1
  t6: i16 = truncate t5
  t8: i32,ch = CopyFromReg t0, Register:i32 %vreg2
            t9: i16 = truncate t8
          t13: i16 = sub Constant:i16<16>, t9
        t14: i8 = truncate t13
      t15: i16 = srl t3, t14
        t10: i8 = truncate t8
      t11: i16 = shl t3, t10
    t16: i16 = or t15, t11
  t19: ch,glue = CopyToReg t0, Register:i16 %AX, t16
  t20: ch = X86ISD::RET_FLAG t19, TargetConstant:i32<0>, Register:i16 %AX,
t19:1

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