[llvm-bugs] [Bug 35589] New: [X86] Scheduling information missing for DIV8r/IDIV8r

via llvm-bugs llvm-bugs at lists.llvm.org
Sat Dec 9 23:53:53 PST 2017


            Bug ID: 35589
           Summary: [X86] Scheduling information missing for DIV8r/IDIV8r
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: enhancement
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: craig.topper at gmail.com
                CC: llvm-bugs at lists.llvm.org

We have scheduling info for DIV8m/IDIV8m, but not the register version

>From schedcov.py:
DIV8r, WriteIDiv, , , WriteDiv8, , , , ZnWriteDiv8
IDIV8r, WriteIDiv, , , WriteIDiv8, , , , ZnWriteDiv8

You are receiving this mail because:
You are on the CC list for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-bugs/attachments/20171210/b006c597/attachment-0001.html>

More information about the llvm-bugs mailing list