[llvm-bugs] [Bug 32544] New: [X86] Unnecessary GR32->GR32 created to zero upper 32-bits or GR64 for zext of basic block input
llvm-bugs at lists.llvm.org
Wed Apr 5 14:21:15 PDT 2017
Bug ID: 32544
Summary: [X86] Unnecessary GR32->GR32 created to zero upper
32-bits or GR64 for zext of basic block input
OS: Windows NT
Component: Backend: X86
Assignee: unassignedbugs at nondot.org
Reporter: craig.topper at gmail.com
CC: llvm-bugs at lists.llvm.org
Created attachment 18233
Because we do isel one basic block at a time, if a basic block contains a zext
i32->i64 of a value produced in another basic block we lose the ability to
determine if the earlier instruction zeroed the upper bits. So we emit an extra
MOV32rr to zero out the bits.
This looks particularly bad when we use the same register for the src and dst
of the move.
The attached test case contains two functions that differ in the placement of
the zext. The one with the zext only in the final block generates an extra
If you run the test through InstCombine you'll also see that even if the zext
starts in the earlier blocks it will get moved to the final block.
Should we teach InstCombine or CodeGenPrepare to hoist "free" zexts closer to
their defs instead of sinking them.
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