[llvm-bugs] [Bug 30653] New: Opcode dressing on MOV instruction with segment register is the wrong size

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=30653

            Bug ID: 30653
           Summary: Opcode dressing on MOV instruction with segment
                    register is the wrong size
           Product: libraries
           Version: 3.9
          Hardware: Other
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: X86
          Assignee: unassignedbugs at nondot.org
          Reporter: njholcomb at wi.rr.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

The result of decoding bytes 8E1E is:
movl (%rsi), %ds

However, the segment register is 16 bits wide. The opcode should be movw.

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