[llvm-bugs] [Bug 27734] New: [InstSimplify] missing vector icmp with constant edge case patterns

[via llvm-bugs]

https://llvm.org/bugs/show_bug.cgi?id=27734

            Bug ID: 27734
           Summary: [InstSimplify] missing vector icmp with constant edge
                    case patterns
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: All
            Status: NEW
          Severity: normal
          Priority: P
         Component: Scalar Optimizations
          Assignee: unassignedbugs at nondot.org
          Reporter: spatel+llvm at rotateright.com
                CC: llvm-bugs at lists.llvm.org
    Classification: Unclassified

This was noted in http://reviews.llvm.org/D17859 where we semi-canonicalized
vector integer LE/GE comparisons: we're missing 3 out 4 of the vector
transforms when doing an icmp against an edge case constant:

define i1 @scalar_uge_true(i4 %x) {
  %cmp = icmp uge i4 %x, 0
  ret i1 %cmp
}

define i1 @scalar_ule_true(i4 %x) {
  %cmp = icmp ule i4 %x, 15
  ret i1 %cmp
}

define i1 @scalar_sge_true(i4 %x) {
  %cmp = icmp sge i4 %x, -8
  ret i1 %cmp
}

define i1 @scalar_sle_true(i4 %x) {
  %cmp = icmp sle i4 %x, 7
  ret i1 %cmp
}

define <4 x i1> @vector_uge_true(<4 x i4> %x) {
  %cmp = icmp uge <4 x i4> %x, zeroinitializer
  ret <4 x i1> %cmp
}

define <4 x i1> @vector_ule_true(<4 x i4> %x) {
  %cmp = icmp ule <4 x i4> %x, <i4 15, i4 15, i4 15, i4 15>
  ret <4 x i1> %cmp
}

define <4 x i1> @vector_sge_true(<4 x i4> %x) {
  %cmp = icmp sge <4 x i4> %x, <i4 -8, i4 -8, i4 -8, i4 -8>
  ret <4 x i1> %cmp
}

define <4 x i1> @vector_sle_true(<4 x i4> %x) {
  %cmp = icmp sle <4 x i4> %x, <i4 7, i4 7, i4 7, i4 7>
  ret <4 x i1> %cmp
}

------------------------------------------------------------------------

$ ./opt -instsimplify vec_icmp.ll -S
...

define i1 @scalar_uge_true(i4 %x) {
  ret i1 true
}

define i1 @scalar_ule_true(i4 %x) {
  ret i1 true
}

define i1 @scalar_sge_true(i4 %x) {
  ret i1 true
}

define i1 @scalar_sle_true(i4 %x) {
  ret i1 true
}

define <4 x i1> @vector_uge_true(<4 x i4> %x) {
  ret <4 x i1> <i1 true, i1 true, i1 true, i1 true>
}

define <4 x i1> @vector_ule_true(<4 x i4> %x) {
  %cmp = icmp ule <4 x i4> %x, <i4 -1, i4 -1, i4 -1, i4 -1>
  ret <4 x i1> %cmp
}

define <4 x i1> @vector_sge_true(<4 x i4> %x) {
  %cmp = icmp sge <4 x i4> %x, <i4 -8, i4 -8, i4 -8, i4 -8>
  ret <4 x i1> %cmp
}

define <4 x i1> @vector_sle_true(<4 x i4> %x) {
  %cmp = icmp sle <4 x i4> %x, <i4 7, i4 7, i4 7, i4 7>
  ret <4 x i1> %cmp
}

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