[LLVMbugs] [Bug 23262] undefined reference to `__atomic_load_8', when it comes to 64-bit atomic load.

[bugzilla-daemon at llvm.org]

https://llvm.org/bugs/show_bug.cgi?id=23262

Richard Smith <richard-llvm at metafoo.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
                 CC|                            |richard-llvm at metafoo.co.uk
         Resolution|---                         |INVALID

--- Comment #2 from Richard Smith <richard-llvm at metafoo.co.uk> ---
GCC miscompiled your code. Note that this instruction:

        movq    terms(%rip), %rax

is *not* atomic, if terms happens to straddle a cache line, which it might
because it has only 4 byte alignment and has size 8.

You should add alignas(8) to your "struct Terms" to work around libstdc++
failing to align std::atomic<T> properly.

Oddly, while x86 does not have a misaligned 8 byte load instruction, it does
have a misaligned 8-byte compare-exchange instruction (lock cmpxchgq), but LLVM
is unable to represent a misaligned cmpxchg, so we won't emit that.

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