[LLVMbugs] [Bug 19836] New: [llvm-mc] Inconsistent meaning of MCFixupKindInfo.TargetOffset values

[bugzilla-daemon at llvm.org]

http://llvm.org/bugs/show_bug.cgi?id=19836

            Bug ID: 19836
           Summary: [llvm-mc] Inconsistent meaning of
                    MCFixupKindInfo.TargetOffset values
           Product: new-bugs
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: new bugs
          Assignee: unassignedbugs at nondot.org
          Reporter: daniel.sanders at imgtec.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

While reviewing one of our MIPS64r6 patches (D3824), I noticed that llvm-mc was
reporting the fixup bits in the wrong places.

Here's an example from MIPS32r2:
    $ bin/llvm-mc temp.s -triple=mips-unknown-linux -show-encoding
-mcpu=mips64r2
        .text

        b       bar # encoding: [0x10'A',A,0x00,0x00]
                    #   fixup A - offset: 0, value: bar, kind: fixup_Mips_PC16
        nop         # encoding: [0x00,0x00,0x00,0x00]
    $ bin/llvm-mc temp.s -triple=mipsel-unknown-linux -show-encoding
-mcpu=mips64r2
        .text

        b       bar # encoding: [A,A,0x00,0x10]
                    #   fixup A - offset: 0, value: bar, kind: fixup_Mips_PC16
        nop         # encoding: [0x00,0x00,0x00,0x00]

As you can see, the big-endian version has put the fixup markers on bits 16-31
and the little endian version has put them on bits 0-15. They should be on bits
0-15 in both cases.

I've looked into it and found that the meaning of MCFixupKindInfo.TargetInfo is
inconsistent between targets. Sparc is using it like so:
        |-- Offset --|-- Width --|
    MSB .............AAAAAAAAAAAAA...... LSB
but MIPS and ARM are using it like this:
              |-- Width --|-- Offset --|
    MSB ......AAAAAAAAAAAAA............. LSB

The two cases look like this in MCAsmStreamer::AddEncodingComment's FixupMap
vector:
                  |-- Offset --|-- Width --|
    Sparc:    MSB .............AAAAAAAAAAAAA...... LSB
    ARM/MIPS: LSB .............AAAAAAAAAAAAA...... MSB
                  ^FixupMap[0]                   ^FixupMap[31]
There doesn't seem to be an attempt to map the bytes of the FixupMap to the
bytes
of the encoding, but it does remap the bits within a byte. If fixup_Mips_PC16
were a 17-bit fixup the example would emit this output:
    $ bin/llvm-mc temp.s -triple=mips-unknown-linux -show-encoding
-mcpu=mips64r2
        .text

        b       bar # encoding: encoding: [0x10'A',A,0bA0000000,0x00]
                    #   fixup A - offset: 0, value: bar, kind: fixup_Mips_PC16
        nop         # encoding: [0x00,0x00,0x00,0x00]
    $ bin/llvm-mc temp.s -triple=mipsel-unknown-linux -show-encoding
-mcpu=mips64r2
        .text

        b       bar # encoding: [A,A,0b0000000A,0x10]
                    #   fixup A - offset: 0, value: bar, kind: fixup_Mips_PC16
        nop         # encoding: [0x00,0x00,0x00,0x00]
The bytes of the fixup are in the wrong places for the big-endian output but
the
partial byte has correctly chosen between the LSB and MSB of that byte.

For now, I'm going to add a big-endian fixup table to the MIPS backend to work
around this but we should make the definition of MCFixupKindInfo.TargetOffset
consistent between targets.

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