[LLVMbugs] [Bug 19762] New: Big endian vector intrinsics are not compatible with GCC

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Fri May 16 03:03:42 PDT 2014


http://llvm.org/bugs/show_bug.cgi?id=19762

            Bug ID: 19762
           Summary: Big endian vector intrinsics are not compatible with
                    GCC
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Backend: ARM
          Assignee: unassignedbugs at nondot.org
          Reporter: james.molloy at arm.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

During a discussion with the GCC folks, two faults in Clang (big endian) were
identified:

   # The lane index to the lane-based vector intrinsics (such as vget_lane) is
being treated as the logical lane, not the architectural lane. Richard Earnshaw
has confirmed that it should be the architectural lane "as if" loaded by LDR.
   # The LD1 intrinsic is a user override and the compiler should not undo the
LD1. The LD1 intrinsic is lowered to a normal LOAD node, so the compiler treats
it like any load and ensures it acts as if the load had been performed by LDR.
But LD1 should override this behaviour, and the load should be performed as if
it were loaded with LD1, not LDR.

The following should be done to fix this:

   # Invert the LLVM-IR lane index created for all v*_lane functions.
   # Perform a reversal on the outcome of a vld1_ intrinsic. With this
reversal, the compiler will do the right thing.

Bug 19392 (http://llvm.org/bugs/show_bug.cgi?id=19392) has been reopened for
ARM64. This bug is for AArch32.

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