[LLVMbugs] [Bug 18667] New: missing load widening

bugzilla-daemon at llvm.org bugzilla-daemon at llvm.org
Wed Jan 29 18:01:03 PST 2014


            Bug ID: 18667
           Summary: missing load widening
           Product: libraries
           Version: trunk
          Hardware: PC
                OS: Linux
            Status: NEW
          Severity: normal
          Priority: P
         Component: Common Code Generator Code
          Assignee: unassignedbugs at nondot.org
          Reporter: nlewycky at google.com
                CC: llvmbugs at cs.uiuc.edu
    Classification: Unclassified

In code like this:

struct {
  unsigned a : 24;
  unsigned char b;
} S;
int test() {
  return S.a;

we can perform a 4-byte load to read 'a', though not a 4-byte store. The clang
-O0 IR for this is:

%struct.anon = type { [3 x i8], i8 }

@S = common global %struct.anon zeroinitializer, align 4

define i32 @test() nounwind uwtable {
  %bf.load = load i24* bitcast (%struct.anon* @S to i24*), align 4
  %bf.cast = zext i24 %bf.load to i32
  ret i32 %bf.cast

which has all the information necessary; a load with align K can load a minimum
of K bytes. Here's what llc does to that IR:

# BB#0:                                 # %entry
        movzbl  S+2(%rip), %ecx
        shll    $16, %ecx
        movzwl  S(%rip), %eax
        orl     %ecx, %eax

That's a 2-byte load and a 1-byte load. I think a 4-byte load then mask (for
zext) would be better. For example, gcc's output:

        movl    S(%rip), %eax
        andl    $16777215, %eax

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